Switches are growing in capacity especially considering growth in data centers and the like. Conventionally, switches rely on electrical interconnects across a backplane to provide interconnection between switch fabric stages (e.g., between line modules and switch modules, between stages, etc.). Disadvantageously, such electrical interconnects are limited in terms of scaling (adding modules) within the constraint of the backplane/chassis in which they reside. As the desire to increase switch fabric capacity grows beyond what a single chassis can provide, there becomes a need to introduce additional fabric elements and/or fabric stages. For example, in a 3-stage Clos fabric, the center or 2nd stage can introduce additional fabric elements to increase fabric size, but such growth requires flexibility to re-distribute the interconnection between the 1st/3rd and 2nd stages. An electrical backplane provides more of a fixed configuration making such fabric expansion difficult by this means. An alternative is to grow the fabric scale by introducing more fabric stages, such as with a five stage Clos fabric implementation. In this case, the fabric elements which include the 2nd and 4th stage may have half of their Input/Output (I/O) capabilities split between interconnection to the 1st and 5th stage and the center or 3rd stage. While allowing for fabric growth, this can require a sizable increase in fabric elements in order to deliver the same amount of non-blocking fabric capacity. For example, the equivalent capacity of one switch element may require three equivalent switch elements to deliver the same capacity.
In any case, when trying to scale the fabric capacity the sheer number of signals which must be managed and physically re-distributed to support a scalable fabric becomes a constraint. The sheer number of signals in a large scale fabric design become an issue when scaling beyond what can be accomplished in a single chassis. As an example, consider a target non-blocking fabric capacity of 500 Tbps where the state of the art electrical Serializer/Deserialize (SERDES) rates are on the order of 50 Gbps, can require a minimum of 10,000 such signals. With the objective of scaling fabric capacity from multi-Tbps to Pbps (Peta-Bit) capacities, there is a need for the ability to grow the fabric scale over time, maintain the efficiencies of a three-stage Clos configuration as long as possible, manage the changing distribution of signals across the fabric as it grows in capacity, leverage such distribution using optical signals which can advantageously be combined on very dense cabling solutions and also provide a means to carry high bandwidth signals over the required physical distances.